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RISC vs CISC Architecture
http://www.ferrousmoon.com:80/forums/viewtopic.php?f=45&t=2550
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Author:  eddieringle [ Wed Aug 10, 2011 3:17 pm ]
Post subject:  RISC vs CISC Architecture

I've heard from both sides on the matter, but I'd like to see all the arguments in one centralized place (here).

Here's what I've heard:
  • CISC fans say that their architecture can do in one instruction what a RISC machine must do in many
  • RISC fans say the "super instructions" CISC is composed of slows down the processor as a whole, and RISC CPUs are generally cheaper than CISC CPUs

Author:  FinalWarrior [ Wed Aug 10, 2011 11:46 pm ]
Post subject:  Re: RISC vs CISC Architecture

Linked this thread to one of my roommates; here's the chatlog.

Me: Interesting question, outside the scope of my knowledge.
Him: Yes?
M: Your thoughts?
H: If you build a button for every possible thing your machine can do, you have a freaking lot of buttons vs. having comboes of buttons for doing things.
H: Freaking lots of buttons means you can just look for the button you want.
H: Second one needs a manual to find out which combo for what, since it's inobvious.
H: In the end, same result, it depends on the scope of your project, as you can see, the tradeoff is mainly in how expandable stuff is.
H: Either way, doing anything complicated is going to require lotsa buttons.
H: If you try to make a button for every possible action, this is obviously unfeasible, yeah? So you'll start to build on top of existing buttons.
H: So everything converges to that point at the high level.
H: aka, this argument is stupid.
H: Really, once you're actually doing high level work, you're writing programs, right?
H: And programs are sequences or combinations of instructions, therefore, you're doing at a high level what RISC processors do at a low level.
H: What it comes down to is at where it's acceptable.
H: Sometimes if you code a function into hardware it can be done faster, and it's worth it.
H: Sometimes, the function is so obscure that why bother? Just do it as a compilation of instructions.
H: So, if you're running like, machinery that has very few possible stuff it'll ever need, it might be feasible to have good coverage in hardware.
H: But this also means your hardware is very specialized for that machinery --- not generally usable for things outside of it.
H: Is this level of performance required? Well, that's of course up to the designer to decide, yes?
H: That's really what it boils down to.
H: Super simplistic view, but I think it covers the main issue.
H: Besides, from a "let's step back and look" view, the two systems aren't completely opposites.
H: you can have a basic instruction set for building programs from and then having specialized hardware for specific tasks if they're particularly important. Gee, I wonder what that sounds like?
M: Iono, a computer? :v
H: Indeed.
H: Which is why this argument is silly.

(I was planning on posting up through "aka", but then he said more stuff that I thought would be relevant/edifying.)

-- Griffinhart

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